`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2025/06/12 10:01:30
// Design Name: 
// Module Name: tb_lin
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module tb_lin();
    reg rst, clk;   
    reg data;
    wire rxd, sender_driver;
    reg work_en, wake_up, txd;


    initial begin            
        $dumpfile("tb_lin.vcd");        
        $dumpvars(0, tb_lin);    
    end

    initial begin
        rst = 1;
        clk = 1;
        work_en = 0;
        wake_up = 1;
        
        
        forever begin
            #10 clk = ~clk;
        end
    end
    
    initial begin
        data <= 0;
        txd <= 0;
        
        #460
        data <= 1;

        # 500
        data <= 0;
        txd <= 1;

        # 500
        data <= 1;
        txd <= 0;

        # 500
        data <= 0;
        txd <= 1;

        # 500
        data <= 1;
        txd <= 0;
        
        # 500
        data <= 0;
        txd <= 1;
        
        # 500
        data <= 1;
        txd <= 0;
        
        # 500
        data <= 0;
        txd <= 1;
        
        // 数据部分
        # 500
        data <= 1;
        txd <= 0;

        # 500
        data <= 0;
        txd <= 1;
        
        # 500
        data <= 0;
        txd <= 0;

        # 500
        data <= 1;

        # 500
        data <= 0;

        # 500
        data <= 1;

        # 500
        data <= 0;
        
        # 500
        data <= 1;
        
        # 500
        data <= 0;
    end


    initial begin
        #140
        rst <= 0;
        
        #200
        work_en <= 1;
        rst <= 1;
    end

    initial
        #100000 $finish;
    

    LINTop top(.clock(clk), .reset(rst), 
            .work_en(work_en), .wake_up(wake_up), 
            .rxd(rxd), .txd(txd), .sender_driver(sender_driver), .receiver_driver(data));
endmodule
